期刊論文
| 期間 |
內容 |
| 2018-06 |
王國華,高振傑,'Finger Detection by Renewed FEMD Method using Kinet',Fu Jen Studies - Science and Engineering,2018-06 |
| 2015-06 |
林煥緒,王國華,'Accelerating Functional Symmetry Detection on CUDA Platform',Fu Jen Studies - Science and Engineering.1-24,2015-06 |
| 2015-06 |
張峰銘,王國華,'Accelerating Boolean Matching for Large Functions on CUDA Platform',Fu Jen Studies - Science and Engineering.127-150,2015-06 |
| 2006.10 |
Y. Y. Liu,K. H. Wang,T. T. Hwang,'Crosstalk Minimization in Logic Synthesis for PLA',ACM Transactions on Design Automation of Electronic Systems (TODAES),vol11.890-915,2006.10 |
| 2006.01 |
S. K. Lu,C. H. Hsu,Y. C. Tsai,K. H. Wang,C. W. Wu,'Efficient Built-In Redundancy Analysis for Embedded Memories with 2-D Redundancy',IEEE Transactions on Very Large Scale Integration (VLSI) Systems,,vol14.34-42,2006.01 |
| 1997.02 |
Kuo-Hua Wang,T. Huang,'Boolean Matching for Incompletely Specified Functions',IEEE Transaction on Computer-Aided-Design of Integrated Circuits and Systems.160-168,1997.02 |
| 1996.10 |
Kuo-Hua Wang,T. Huang,C. Chen,'Exploiting Communication Complexity for Boolean Matching',IEEE Transactions on Computer-Aided-Design of Integrated Circuits and Systems.1249-1256,1996.10 |
| 1994.10 |
T. Hwang,R.M. Owens,M.J. Irwin,Kuo-Hua Wang,'Logic Synthesis for Field Programmable Gate Arrays',IEEE Transactions on Computer-Aided-Design of Integrated Circuits and Systems.1280-1287,1994.10 |
| 1993.09 |
Kuo-Hua Wang,T. Huang,C. Chen,'Overlapped Decomposition for Communication Complexity Driven Multilevel Logic Synthesis',IEICE Transactions on Information and Systems Synthesis and Verification of Hardware Design.1075-1084,1993.09 |
|
研討會論文
| 期間 |
內容 |
| 2010.11.07 |
賴之凡,江介宏,王國華,'Boolean Matching of Function Vectors with Strengthened Learning',2010 Interantional Conference on Computer-Aided Design (ICCAD-2010),聖荷西,2010.11.07 |
| 2010.06.13 |
賴之凡,江介宏,王國華,'BooM: A Decision Procedure for Boolean Matching with Abstraction and Dynamic Learning',47'th Design Automation Conference (DAC-2010),美國,安納海姆,2010.06.13 |
| 2009.07.26 |
王國華,詹仲銘,劉榮章,'Simulation and SAT-based Boolean matching for large Boolean networks',46'th Design Automation Conference (DAC'09),美國,舊金山,2009.07.26 |
| 2007.11 |
Kuo-Hua Wang,Chung-Ming Chan,'Incremental Learning Approach and SAT Model for Boolean Matching with Don't Cares',International Conference on Computer-Aided Design (ICCAD-07),2007.11 |
| 2007.10.12 |
Kuo-Hua Wang,Chung-Ming Chan,'SAT Based Boolean Matching for Incompletely Specified Functions',The Workshop on Synthesis and System Integration of Mixed Information Technologies,日本,札幌,2007.10.12 |
| 2007.05.29 |
Kuo-Hua Wang,Chung-Ming Chan,'Incremental Learning Approach and SAT Model for Boolean Matching with Don't Cares',International Workshop on Logic and Synthesis,2007.05.29 |
| 2006.07.27 |
K. H. Wang,'Exploiting K-Distance Signatures for Boolean Matching and G-Symmetry Detection', Design Automation Conference (DAC-06,USA,San Francisco,2006.07.27 |
| 2006.04 |
K. H. Wang,'Exploiting K-Distance Signatures for Boolean Matching and G-Symmetry Detection',the Workshop on Synthesis And System Integration of Mixed Information Technologies,日本,名古屋,2006.04 |
| 2005.01 |
Kuo-Hua Wang,Jia-Hung Chen,'K-Disjointness Paradigm with Application to Symmetry Detection for Incompletely Specified Functions',Asia and South Pacific Design Automation Conference,China,Shanghai,2005.01 |
| 2004.08 |
Kuo-Hua Wang,Jia-Hung Chen,'Symmetry Detection for Incompletely Specified Functions with K-Disjointness Paradigm',VLSI/CAD Symposium,R.O.C.,2004.08 |
| 2004.08 |
Kuo-Hua Wang,Jia-Hung Chen,'Quick Symmetry Detection Method for Boolean Functions with Don’t Cares', VLSI/CAD Symposium,Taiwan,2004.08 |
| 2004.06 |
Kuo-Hua Wang,Jia-Hung Chen,'Symmetry Detection for Incompletely Specified Functions',Design Automation Conference,U.S.A., San Diego,2004.06 |
| 2004.02 |
Y. Y. Liu,K. H. Wang,T. T. Hwang,'Crosstalk Minimization in Logic Synthesis for PLA',Automation and Test in Europe Conference 2004,French,Paris,2004.02 |
| 2001.05 |
Y.Y. Liu,Kuo-Hua Wang,T.Huang,'Binary Decision Diagram with Minimum Expected Path Length',Automation and Test in Europe Conference 2001,Germany,2001.05 |
| 1996 |
T. Hwang,K.H. Wang,'Boolean Matching in Logic Synthesis',SASMI, Synthesis and System Integration of Mixed Information Technology Workshop,Japan,1996 |
| 1995.06 |
Kuo-Hua Wang,T. Huang,'Boolean Matching for Incompletely Specified Functions',Design Automaion Conference,U.S.A.,1995.06 |
| 1994.10 |
K. H. Wang,W. S. Wang,T. T. Hwang,Allen C.H. Wu,Y. L. Lin,'State Assignment for Power and Area Minimization',International Conference on Computer Design (ICCD94),1994.10 |
| 1993.08 |
Kuo-Hua Wang,T. Huang,C. Chen,'Technology Mapping for FPGA’s with Generalized Functional Decomposition',CAD/Graphic’93,China,1993.08 |
| 1993.02 |
Kuo-Hua Wang,T. Huang,C. Chen,'Restructuring Binary Decision Diagrams Based on Functional Equivalence',Proceedings Design Automation and Test in Europe Conference,French,Paris,1993.02 |
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